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W25Q64DW
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Data bytes are shifted with Most Significant Bit first. Byte fields with data in parenthesis “( )” indicate data
output from the device on either 1, 2 or 4 IO pins.
The Status Register contents and Device ID will repeat continuously until /CS terminates the instruction.
At least one byte of data input is required for Page Program, Quad Page Program and Program Security
Registers, up to 256 bytes of data input. If more than 256 bytes of data are sent to the device, the
addressing will wrap to the beginning of the page and overwrite previously sent data.
See Manufacturer and Device Identification table for device ID information.
Security Register Address:
Security Register 0: A23-16 = 00h; A15-8 = 00h; A7-0 = byte address
Security Register 1: A23-16 = 00h; A15-8 = 10h; A7-0 = byte address
Security Register 2: A23-16 = 00h; A15-8 = 20h; A7-0 = byte address
Security Register 3: A23-16 = 00h; A15-8 = 30h; A7-0 = byte address
Please note that Security Register 0 is Reserved by Winbond for future use. It is recommended to use
Security registers 1- 3 before using register 0.
Dual SPI address input format:
IO0 = A22, A20, A18, A16, A14, A12, A10, A8 A6, A4, A2, A0, M6, M4, M2, M0
IO1 = A23, A21, A19, A17, A15, A13, A11, A9 A7, A5, A3, A1, M7, M5, M3, M1
Dual SPI data output format:
IO0 = (D6, D4, D2, D0)
IO1 = (D7, D5, D3, D1)
Quad SPI address input format: Set Burst with Wrap input format:
IO0 = A20, A16, A12, A8, A4, A0, M4, M0 IO0 = x, x, x, x, x, x, W4, x
IO1 = A21, A17, A13, A9, A5, A1, M5, M1 IO1 = x, x, x, x, x, x, W5, x
IO2 = A22, A18, A14, A10, A6, A2, M6, M2 IO2 = x, x, x, x, x, x, W6, x
IO3 = A23, A19, A15, A11, A7, A3, M7, M3 IO3 = x, x, x, x, x, x, x,
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Quad SPI data input/output format:
IO0 = (D4, D0, …..)
IO1 = (D5, D1, …..)
IO2 = (D6, D2, …..)
IO3 = (D7, D3, …..)
Fast Read Quad I/O data output format:
IO0 = (x, x, x, x, D4, D0, D4, D0)
IO1 = (x, x, x, x, D5, D1, D5, D1)
IO2 = (x, x, x, x, D6, D2, D6, D2)
IO3 = (x, x, x, x, D7, D3, D7, D3)
Word Read Quad I/O data output format:
IO0 = (x, x, D4, D0, D4, D0, D4, D0)
IO1 = (x, x, D5, D1, D5, D1, D5, D1)
IO2 = (x, x, D6, D2, D6, D2, D6, D2)
IO3 = (x, x, D7, D3, D7, D3, D7, D3)
For Word Read Quad I/O, the lowest address bit must be 0. (A0 = 0)
For Octal Word Read Quad I/O, the lowest four address bits must be 0. (A3, A2, A1, A0 = 0)
QPI Command, Address, Data input/output format:
CLK # 0 1 2 3 4 5 6 7 8 9 10 11
IO0 = C4, C0, A20, A16, A12, A8, A4, A0, D4, D0, D4, D0
IO1 = C5, C1, A21, A17, A13, A9, A5, A1, D5, D1, D5, D1
IO2 = C6, C2, A22, A18, A14, A10, A6, A2, D6, D2, D6, D2
IO3 = C7, C3, A23, A19, A15, A11, A7, A3, D7, D3, D7, D3
The number of dummy clocks for QPI Fast Read, QPI Fast Read Quad I/O & QPI Burst Read with Wrap is
controlled by read parameter P7 – P4.
The wrap around length for QPI Burst Read with Wrap is controlled by read parameter P3 – P0.
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